ARM acquires HPC/supercomputer software specialist Allinea

ARM acquires HPC/supercomputer software specialist Allinea

By Unknown   03:23   No comments:

Processor core IP supplier ARM has acquired supercomputer software vendor Allinea Software. Although ARM has a huge share in the embedded, mobile and portable computing market, its processors are not used much in the high performance computers such as supercomputers. ARM has entered the server market in last 3/4 years, and is now trying to get into high-performance computing/supercomputer market. 

This acquisition is aimed at strengthening its capability in HPC, so that its customers can be given processor core IP and also the software to debug and tune the high-performance computing design. ARM 64-bit ARMv8-A processor cores were used Fujitsu's powered Post K supercomputer, and the company has launched ARMv8-A Scalable Vector Extension. 

ARM says ARMv8-A is the first alternative architecture with OpenHPC support, and the release of ARM Performance Libraries, which provide ease of software development and portability to ARMv8-A server platforms, added to this now is Allinea's software.

Majority of supercomputer developers are said to use Allinea's tools. The example of its customers include US Department of Energy, and NASA.

Javier Orensanz, general manager, development solutions group, ARM said "Allinea's ability to debug and analyze many-node systems is unique, and with this acquisition we are ensuring that this capability remains available to the whole ARM ecosystem, and to the other CPU architectures prevalent in HPC, as well as in future applications such as artificial intelligence, machine learning and advanced data analytics."

ARM said Allinea will be integrated into the ARM business with all functions and Allinea's Warwick and Eastleigh locations retained. Allinea's former CEO David Lecomber will join the ARM development solutions group management team.

Read More

Google puts Intel on notice, ‘looks forward’ to using non-Intel chips within its cloud

Google puts Intel on notice, ‘looks forward’ to using non-Intel chips within its cloud

By Unknown   07:00   No comments:

Today, Intel owns the data center market. The only challenger in the x86 space, AMD, once claimed a significant share of that market, but has been all-but eliminated after years of noncompetitive CPU architectures. AMD has been driven to single-digit market share, though the company hopes to take back some of it with its upcoming Zen processor, due next year. Other vendors, like IBM or ARM, have an even smaller market share than AMD. That could change in the next few years, however, and Google has flung its support behind a new interconnect standard, OpenCAPI, and IBM’s POWER9 CPU architecture.

In a blog post on Friday, Google announced that it had joined the OpenCAPI consortium, a group dedicated to developing a next-generation set of interconnects for servers and data centers. If this is giving you a sense of déjà vu, never fear — the Gen-Z announcement we covered last week also concerned a large group of companies that are developing a next-generation interconnect, and most of the same companies are members. Gen-Z aims to develop an interconnect standard for storage devices, heterogeneous accelerators, and pooled memory using memory semantic fabric, while OpenCAPI uses DMA semantics. Google and Nvidia are the only two members of OpenCAPI that aren’t also members of Gen-Z.

In its blog post, Google documents a new server it has developed, the Zaius P9 (which implements the OpenCAPI standard).

Zaius is designed to use two IBM POWER9 LaGrange CPUs with support for DDR4 (16 DIMM slots per CPU, 32 total), along with two 30-bit buses handling inter-CPU communication. POWER9 will include support for PCI Express Gen 4, with 84 lanes spread between the two processors. PCIe 4.0 isn’t expected to be finalized until 2017, and there’s no word on when consumer hardware will actually be available. Power9 is expected in 2017, but we don’t know when Google‘s Zaius specifically will debut. The chips themselves will target a 225W TDP, well above most of Intel’s hardware.

The goal of these new interconnect initiatives is to challenge Intel’s dominance in this space. OpenCAPI is a project Nvidia has prominently planned to support with the enterprise version of its Pascal architecture, and AMD has its own reasons for cooperating with such efforts. If it wants to win back space for Zen, it may have decided throwing its own lot in with competitors working on new interconnects is the right way to do that. There’s precedent for doing this — back in 2003, it was AMD’s HyperTransport bus and its support for “glueless” multi-socket systems that gave the company a prominent advantage over Intel in the multi-socket server market. Even after dual and quad-core chips were available, Opteron continued to outperform some of its Core 2-equivalents in multi-socket configurations, at least for a little while.

The threat to Intel is in the last line of Google’s blog post, where the company writes: “We look forward to a future of heterogeneous architectures within our cloud. And, as we continue our commitment to open innovation, we’ll continue to collaborate with the industry to improve these designs and the product offerings available to our users.”

That might seem like a mild sentence, but it’s a shot across the bow. Google is prominently backing Intel’s chief competitors, and given the consistent downturn in the PC industry, you can bet that Intel is taking any and all threats to its data center market extremely seriously.

Read More

The Core Technologies of Deep Learning

The Core Technologies of Deep Learning

By Unknown   06:30   No comments:

When the movie The Terminator was released in 1984, the notion of computers becoming self-aware seemed so futuristic that it was almost difficult to fathom. But just 22 years later, computers are rapidly gaining the ability to autonomously learn, predict, and adapt through the analysis of massive datasets. And luckily for us, the result is not a nuclear holocaust as the movie predicted, but new levels of data-driven innovation and opportunities for competitive advantage for a variety of enterprises and industries.

Artificial intelligence (AI) continues to play an expanding role in the future of high-performance computing (HPC). As machines increasingly become able to learn and even reason in ways similar to humans, we’re getting closer to solving the tremendously complex social problems that have always been beyond the realm of compute. Deep learning, a branch of machine learning, uses multi-layer artificial neural networks and data-intensive training techniques to refine algorithms as they are exposed to more data. This process emulates the decision-making abilities of the human brain, which until recently was the only network that could learn and adapt based on prior experiences.

Deep learning networks have grown so sophisticated they’ve begun to deliver even better performance than traditional machine learning approaches. One advantage of deep learning is that there is little need to "train" the system and define features that might be useful for modeling and prediction. With only basic labeling, machines can now learn these features independently as more data is introduced to the model. Deep learning has even begun to surpass the capabilities and speed of the human brain in many areas, including image, speech, or text classification, natural language processing, and pattern recognition.

The core technologies required for deep learning are very similar to those necessary for data-intensive computing and HPC applications. Here are a few technologies that are well-positioned to support deep learning networks.

Multi-core processors:

Deep learning applications require substantial amounts of processing power, and a critical element to the success and usability of deep learning comes with the ability to reduce execution times. Multi-core processor architectures currently dominate the TOP500 list of the most powerful supercomputers available today, with 91% based on Intel processors. Multiple cores can run numerous instructions at the same time, increasing the overall processing speed for compute-intensive programs like deep learning, while reducing power requirements, increasing performance, and allowing for fault tolerance.

The Intel® Xeon Phi™ Processor, which features a whopping 72 cores, is geared specifically for high-level HPC and deep learning. These many-core processors can help data scientists significantly reduce training times and run a wider variety of workloads, something that is critical to the computing requirements of deep neural networks.

Software frameworks and toolkits:

There are various frameworks, libraries, and tools available today to help software developers train and deploy deep learning networks, such as Caffe, Theano, Torch, and the HPE Cognitive Computing Toolkit. Many of these tools are built as resources for those new to deep learning systems, and aim to make deep neural networks available to those that might be outside of the machine learning community. These tools can help data scientists significantly reduce model training times and accelerate time to value for their new deep learning applications.

Deep learning hardware platforms:

Not every server can efficiently handle the compute-intensive nature of deep learning environments. Hardware platforms that are purpose-built to handle these requirements will offer the highest levels of performance and efficiency. New HPE Apollo systems contain a high ratio of GPUs to CPUs in a dense 4U form factor, which enables scientists to run deep learning algorithms faster and more efficiently while controlling costs.

Enabling technologies for deep learning is ushering in a new era of cognitive computing that promises to help us solve the world’s greatest challenges with more efficiency and speed than ever before. As these technologies become faster, more available, and easier to implement, deep learning technologies will secure their place in real-world applications – not in science fiction.

Read More