Qualcomm, Microsoft announce Windows 10 on ARM

Qualcomm, Microsoft announce Windows 10 on ARM

By Unknown   03:53   No comments:

Microsoft has announced a partnership with Qualcomm to bring Windows 10 - real Windows 10, not the aborted cut-down version formerly known as Windows RT - to the company's ARM processors.

Microsoft's previous attempts at playing with non-x86/AMD64 platforms have not exactly set the world aflame. The company has long offered an embedded Windows release which supports ARM and other non-x86/AMD64 architectures, and recently made that available to a wider audience under the moniker Windows 10 IoT Core. Although Windows 10 IoT Core does indeed run on ARM-based devices, in particular the popular Raspberry Pi single-board computer, it's not Windows as most users would know it; instead it's a cut-down operating system designed to run a single application at a time, and built with the intention of winning over embedded developers from Linux and other non-Windows kernels to the Windows ecosystem.

The closest Microsoft has ever come to a true release of a consumer-centric Windows version on ARM was Windows RT, launched alongside Windows 8 on Microsoft's Surface family of tablets. While one or two hardware partners licensed Windows RT, it was soon abandoned by both third parties and Microsoft itself: Microsoft confirmed in 2015 that Windows RT would not be updated to a Windows 10-based version, and sank the final nail into its coffin a few months later by leaving Windows RT out of its so-called 'Universal' Windows Platform.

Now, though, Microsoft is having another crack of the whip, and it's convinced Qualcomm to come along for the ride. Devices built around Qualcomm's latest Snapdragon processors will, the companies have jointly announced, be able to run Windows 10 - and this time it's truly the same release of Windows you'd find on an x86/AMD64 device. Not only will it run Windows 10, mind you, but also Windows 10's considerable ecosystem of applications - including those compiled exclusively for Win32 under the x86 architecture and the Universal Windows Platform.

'To deliver on our customers' growing needs to create on the go, we announced today that Windows 10 is coming to ARM through our partnership with Qualcomm,' explained Microsoft's Terry Myerson in a blog post late last night. 'For the first time ever, our customers will be able to experience the Windows they know with all the apps, peripherals, and enterprise capabilities they require, on a truly mobile, power efficient, always-connected cellular PC.'

Technical details of how the system will work have not yet been released, but the secret lies in emulation: a translation engine will take the x86/AMD64 instructions from the operating system and the software it's hosting and translate them into ARM instructions for the host processor. It's a tried-and-tested approach which gave machines like the Acorn Archimedes and Commodore Amiga basic x86 support in the 1980s and 1990s, though one which typically comes with a considerable performance hit - something for which Qualcomm's latest chips, it is to be hoped, can compensate.

A video demonstrating Windows 10 and Adobe Photoshop running on an ARM-based device is reproduced below, with Qualcomm and Microsoft promising to launch the first units some time next year.

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Packet.net strong-ARMs cloud for $0.005 per core per hour

Packet.net strong-ARMs cloud for $0.005 per core per hour

By Unknown   06:42   No comments:

Packet.net strong-ARMs cloud for $0.005 per core per hour

Packet.net, a bare-metal cloud aimed at developers, has flicked the switch on cloud-running servers powered by a pair of Cavium's 48-core ARMv8-A ThunderX processors.

CEO Zachary Smith told The Register that the company's cooked up the cloud for a few reasons. Price is one: Packet will offer ARM cores at a tenth of the price it charges for Intel cores, at US$0.50 per hour per server, or $0.005 per core per hour. Smith thinks that will be a head-turner by itself.

He also thinks developers will appreciate the chance to try native Docker on many-cored machines and appreciate the opportunity an ARM-powered cloud represents as they pursue 100 per cent portable software. He believes open source folk will see the arrival of an ARM-powered cloud as incentive to accelerate cross-platform versions of their pet projects.

Even ARM will benefit, he says, because having a working cloud on the market will give both it and licensees more reason to innovate for the data centre.

ARM's recent purchaser, SoftBank, recently tipped some money into Packet.net, but Smith swears he's had a long-term ambition to offer an ARM-powered cloud, if only because he enjoys having multiple ARM server CPU vendors willing to do deals. That kind of competition is not currently possible in the x86 world, at least until AMD returns to servers in 2017.

Smith also feels that ARM clouds are inevitable, probably thanks to telcos looking to offer cores to rent at the edge of their networks. The CEO feels that telcos will build edge clouds because they're sick of over-the-top players having all the fun and profits: this time telcos want to build a revenue-generating platform beyond mere carriage.

For now, Packet's ARM cloud offers 64-bit Ubuntu 16.04, but promises that CoreOS, FreeBSD and CentOS are in the pipeline. Four different ARM server configurations are also in the works.

The cloud will have an API, a portal, and will also be accessible from DevOps favourites likes Terraform and Ansible. Four of the company's bit barns – in Parsippany New Jersey, Sunnyvale California, Amsterdam and Tokyo – will offer the service as of Tuesday.

"We want to offer a super-cheap, 'you would be stupid not to try it' offering," Smith told The Register. "If we can get the open source ecosystem rebooted, I think Intel's grip on the data centre will be shattered." ®

 

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China’s growing robotics industry suffers from lack of operators, integration

China’s growing robotics industry suffers from lack of operators, integration

By Unknown   06:18   No comments:

At the World Robot Conference 2016, which ran from Friday to Tuesday in a southern suburb of Beijing, some companies complained that the event is unlikely to help them due to the overheated market. Manufacturers looking to automate have had a hard time finding workers to operate their robots, and the industry is still struggling with how to better integrate operation systems. The frenzy in China's robotics market is cooling, and people are raising more practical questions about how to best implement robotics in manufacturing.

 Beijing-based Yaskawa Shougang Robot Co showcases its industrial robots at the World Robot Conference 2016 in Beijing. Photo: Chen Qingqing/GT

On a chilly Friday afternoon, dozens of attendees at the World Robot Conference 2016 in suburban Beijing gathered around an industrial robotic arm demonstrating its delicate grip and wide range of motion.

The six-axis robotic arm can be used in a wide range of applications such as assembly, dispensing, materials handling and packaging.

"I am not surprised by the progress these exhibitors have made in automation. I know many Chinese factories are equipped with industrial robots to increase efficiency," an attendee surnamed Zhang told the Global Times on Friday at the conference, which ended on Tuesday.

China has been considered a growth market for industrial robots over the last few years, Vitaly Nedelskiy, president of the Russian Association of Robotics, said at the conference on Friday.

China's supply of industrial robots grew by a robust 17 percent in 2015, Nedelskiy noted. Companies installed 68,000 robots last year, though the ratio of robots to workers remains far below the global average.

Globally, the average ratio of robots to workers, known in the industry as robot density, stood at 69 installed robots for every 10,000 employees in 2015, according to the International Federation of Robotics (IFR).

By comparison, China's average robot density is about 49 robots per 10,000 workers, Nedelskiy noted.

Under its "Made in China 2025" or China's "Industry 4.0," the Chinese government has set a target for China to have 150 robots per 10,000 workers by 2020.

To achieve the goal, the country's industrial enterprises would have to add 600,000 to 650,000 industrial robots by the end of the decade, according to the IFR.

Because the government is encouraging Chinese manufacturers to install more automated machinery and robots to boost efficiency, about 3,400 companies around the country are now engaged in the robotics business, domestic industry news site robot.ofweek.com reported in May.

However, the development of China's robotics industry has been uneven and the market has grown overheated, leaving major challenges that need to be addressed, industry experts said during the conference.

Men and machines

Despite the rapid growth of China's robotics industry, which had about 20 percent of the domestic market share in 2015, the country lacks workers trained to run the machines, said Qu Daokui, president of Shenyang SIASUN Robot & Automation Co. The lack of workers is one of the major issues many Chinese factories are facing today.

With the government so clearly behind the robotics industry, factories have jumped to acquire automated machinery. The city of Dongguan, South China's Guangdong Province, often referred to as "the world's factory," has adopted a strategy called "Robotics-powered Smart Manufacturing" to improve the productivity of local manufacturers.

There are nearly 200 robot manufacturers in Dongguan, according to a document the local government sent to the Global Times in February. So far, 400 factories have been equipped with a total of 10,000 robots.

Although they have the robots, they still need people to operate them, said Qu, whose company acquired a German vocational training institution in February.

"More and more factories are asking us to teach them how to use [industrial robots], instead of just installing them, which illustrates how important it is to educate more skillful workers," Qu told the Global Times.

The lack of trained workers has weighed on some small and medium-sized enterprises (SMEs) in the Pearl River Delta, said an employee in charge of automation at an original equipment manufacturer in Dongguan, who spoke on the condition of anonymity. Dongguan is an industrial powerhouse in the Pearl River Delta region.

The situation also jeopardizes the government's goal of automating more of the city's manufacturing industry.

"It's hard to find sufficient skillful workers who can handle those machines, and some factories only use automated machines when local officials visit their production lines, and they go back to labor-intensive production after [the officials] leave," the employee told the Global Times on Sunday.

The factories benefit from the government subsidies they receive for rebranding themselves as an "automated business," but few local SMEs actually benefit from installing industrial robots, the employee said.

As it turns out, operating a robot is a multidisciplinary task involving the integration of software, hardware and core technologies, experts said.

A lot of people just think "I'll buy a robot and place it and connect it", but they end up with a lot of problems, said Oussama Khatib, director of robotics laboratory at Stanford University.

Technology and the future

For those who focus on research and development (R&D) in the robotics sector, more effort needs to be made to make the machine smarter by introducing more advanced technologies, but China has a long way to go, industry representatives said.

The rise of China's robotics industry has encouraged a growing number of companies to enter the field, but many of them don't bother with developing their own core technology and stick to manufacturing low-end products, said Gan Zhongxue, chief technology officer of the ENN Group.

"Some elements like the RV reducer and controller are still produced by foreign companies," he told the Global Times on Friday. An RV reducer, one of reduction gears, is used for transmission and the controller is used for controlling the machine.

Purchasing those components from overseas raises the manufacturing costs for Chinese robotics companies.

As far as technological trends are concerned, companies will be concentrating on the collaboration between humans and machines, simplified applications and light-weight robots, the IFR said in its World Robotics Report 2016.

And the demand for industrial robots will likewise be driven by a whole assortment of factors, such as the handling of new materials, energy efficiency, and better developed automation concepts, the report said.

For now, a large part of industrial robots are operating under digital control systems, but a more harmonized human-robot interaction requires greater flexibility and autonomous operation in unstructured environments, which is unlikely to be achieved for the moment, said Zuo Shiquan, head of the equipment industry institute at the CCID Institute affiliated with the Ministry of Industry and Information Technology.

"Although the application of robots in China has expanded in recent years, the next step ought to be to improve R&D, which will help keep us from falling behind our foreign competitors," he told the Global Times.

 By Chen Qingqing Source:Global Times Published: 2016/10/24 19:38:39

  

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Google’s Making Its Own Chips Now. Time for Intel to Freak Out

Google’s Making Its Own Chips Now. Time for Intel to Freak Out

By Unknown   07:10   No comments:

Google’s Making Its Own Chips Now. Time for Intel to Freak Out

The Internet’s most powerful company sent a few shock waves through the tech world yesterday when it revealed that a new custom-designed chip helps run what is surely the future of its vast online empire: artificial intelligence.

In building its own chip, Google has taken yet another step along a path that has already remade the tech industry in enormous ways. Over the past decade, the company has designed all sorts of new hardware for the massive data centers that underpin its myriad online services, including computer servers, networking gear, and more. As it created services of unprecedented scope and size, it needed a more efficient breed of hardware to run these services. Over the years, so many other Internet giants have followed suit, forcing a seismic shift in the worldwide hardware market.

With its new chip, Google’s aim is the same: unprecedented efficiency. To take AI to new heights, it needs a chip that can do more in less time while consuming less power. But the effect of this chip extends well beyond the Google empire. It threatens the future of commercial chip makers like Intel and nVidia—particularly when you consider Google’s vision for the future. According to Urs Hölzle, the man most responsible for the global data center network that underpins the Google empire, this new custom chip is just the first of many.

No, Google will not sell its chips to other companies. It won’t directly compete with Intel or nVidia. But with its massive data centers, Google is by far the largest potential customer for both of those companies. At the same time, as more and more businesses adopt the cloud computing services offered by Google, they’ll be buying fewer and fewer servers (and thus chips) of their own, eating even further into the chip market.

Indeed, Google revealed its new chip as a way of promoting the cloud services that let businesses and coders tap into its AI engines and build them into their own applications. As Google tries to sell other companies on the power of its AI, it’s claiming—in rather loud ways—that it boasts the best hardware for running this AI, hardware that no other company has.

Google’s Need for Speed

Google’s new chip is called the Tensor Processing Unit, or TPU. That’s because it helps run TensorFlow, the software engine that drives the Google’s deep neural networks, networks of hardware and software that can learn particular tasks by analyzing vast amounts of data. Other tech giants typically run their deep neural nets with graphics processing units, or GPUs—chips that were originally designed to render images for games and other graphics-heavy applications. These are well-suited to running the types of calculations that drive deep neural networks. But Google says it has built a chip that’s even more efficient.

According to Google, it tailored the TPU specifically to machine learning so that it needs fewer transistors to run each operation. That means it can squeeze more operations into the chip with each passing second.

For now, Google is using both TPUs and GPUs to run its neural nets. Hölzle declined to go into specifics on how exactly Google was using its TPUs, except to say that they handle “part of the computation” needed to drive voice recognition on Android phones. But he said that Google would be releasing a paper describing the benefits of its chip and that Google will continue to design new chips that handle machine learning in other ways. Eventually, it seems, this will push GPUs out of the equation. “They’re already going away a little,” Hölzle says. “The GPU is too general for machine learning. It wasn’t actually built for that.”

That’s not something nVidia wants to hear. As the world’s primary seller of GPUs, nVidia is now pushing to expand its own business into the AI realm. As Hölzle points out, the latest nVidia GPU offers a mode specifically for machine learning. But clearly, Google wants the change to happen faster. Much faster.

The Smartest Chip

In the meantime, other companies, most notably Microsoft, are exploring another breed of chip. The field-programmable gate array, or FPGA, is a chip you can re-program to perform specific tasks. Microsoft has tested FPGAs with machine learning, and Intel, seeing where this market was going, recently acquired a company that sells FPGAs.

Some analysts think that’s the smarter way to go. An FPGA provides far more flexibility, says Patrick Moorhead, the president and principal analyst at Moor Insights and Strategy, a firm that closely follows the chip business. Moorhead wonders if the new Google TPU is “overkill,” pointing out that such a chip takes at least six months to build—a long time in the incredibly competitive marketplace in which the biggest Internet companies compete.

But Google doesn’t want that flexibility. More than anything, it wants speed. Asked why Google built its chip from scratch rather than using an FPGA, Hölzle said: “It’s just much faster.”

Core Business

Hölzle also points out that Google’s chip doesn’t replace CPUs, the central processing units at the heart of every computer server. The search giant still needs these chips to run the tens of thousands of machines in its data centers, and CPUs are Intel’s main business. Still, if Google is willing to build its own chips just for AI, you have to wonder if it would go so far as to design its own CPUs as well.

Hölzle plays down the possibility. “You want to solve problems that are not solved,” he says. In other words, CPUs are a mature technology that pretty much works as it should. But he also said that Google wants healthy competition in the chip market. In other words, it wants to buy from many sellers—not just, say, Intel. After all, more competition means lower prices for Google. As Hölzle explains, expanding its options is why Google is working with the OpenPower Foundation, which seeks to offer chip designs that anyone can use and modify.

That’s a powerful idea, and a potentially powerful threat to the world’s biggest chip makers. According to Shane Rau, an analyst with research firm IDC, Google buys about 5 percent of all server CPUs sold on Earth. Over a recent year-long period, he says, Google bought about 1.2 million chips. And most of those likely came from Intel. (In 2012, Intel exec Diane Bryant told WIRED that Google bought more server chips from Intel than all but five other companies—and those were all companies that sell servers.)

Whatever its plans for the CPU, Google will continue to explore chips specifically suited to machine learning. It will be several years before we really know what works and what doesn’t. After all, neural networks are constantly evolving as well. “We’re learning all the time,” he says. “It’s not clear to me what the final answer is.” And as it learns, you can bet that the world’s chip makers will be watching.

   

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Google puts Intel on notice, ‘looks forward’ to using non-Intel chips within its cloud

Google puts Intel on notice, ‘looks forward’ to using non-Intel chips within its cloud

By Unknown   07:00   No comments:

Today, Intel owns the data center market. The only challenger in the x86 space, AMD, once claimed a significant share of that market, but has been all-but eliminated after years of noncompetitive CPU architectures. AMD has been driven to single-digit market share, though the company hopes to take back some of it with its upcoming Zen processor, due next year. Other vendors, like IBM or ARM, have an even smaller market share than AMD. That could change in the next few years, however, and Google has flung its support behind a new interconnect standard, OpenCAPI, and IBM’s POWER9 CPU architecture.

In a blog post on Friday, Google announced that it had joined the OpenCAPI consortium, a group dedicated to developing a next-generation set of interconnects for servers and data centers. If this is giving you a sense of déjà vu, never fear — the Gen-Z announcement we covered last week also concerned a large group of companies that are developing a next-generation interconnect, and most of the same companies are members. Gen-Z aims to develop an interconnect standard for storage devices, heterogeneous accelerators, and pooled memory using memory semantic fabric, while OpenCAPI uses DMA semantics. Google and Nvidia are the only two members of OpenCAPI that aren’t also members of Gen-Z.

In its blog post, Google documents a new server it has developed, the Zaius P9 (which implements the OpenCAPI standard).

Zaius is designed to use two IBM POWER9 LaGrange CPUs with support for DDR4 (16 DIMM slots per CPU, 32 total), along with two 30-bit buses handling inter-CPU communication. POWER9 will include support for PCI Express Gen 4, with 84 lanes spread between the two processors. PCIe 4.0 isn’t expected to be finalized until 2017, and there’s no word on when consumer hardware will actually be available. Power9 is expected in 2017, but we don’t know when Google‘s Zaius specifically will debut. The chips themselves will target a 225W TDP, well above most of Intel’s hardware.

The goal of these new interconnect initiatives is to challenge Intel’s dominance in this space. OpenCAPI is a project Nvidia has prominently planned to support with the enterprise version of its Pascal architecture, and AMD has its own reasons for cooperating with such efforts. If it wants to win back space for Zen, it may have decided throwing its own lot in with competitors working on new interconnects is the right way to do that. There’s precedent for doing this — back in 2003, it was AMD’s HyperTransport bus and its support for “glueless” multi-socket systems that gave the company a prominent advantage over Intel in the multi-socket server market. Even after dual and quad-core chips were available, Opteron continued to outperform some of its Core 2-equivalents in multi-socket configurations, at least for a little while.

The threat to Intel is in the last line of Google’s blog post, where the company writes: “We look forward to a future of heterogeneous architectures within our cloud. And, as we continue our commitment to open innovation, we’ll continue to collaborate with the industry to improve these designs and the product offerings available to our users.”

That might seem like a mild sentence, but it’s a shot across the bow. Google is prominently backing Intel’s chief competitors, and given the consistent downturn in the PC industry, you can bet that Intel is taking any and all threats to its data center market extremely seriously.

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ARM processor dedicated for functional safety applications

ARM processor dedicated for functional safety applications

By Unknown   05:40   No comments:

The Cortex-R52 by ARM was designed to address functional safety in systems that need to comply with ISO 26262 (ASIL D) and IEC 61508 (SIL 3). ST Microelectronics is the first chip vendor, which licensed the processor.

                                                  ARM processor dedicated for functional safety applications

The Cortex-R52 offers hardware-enforced separation of software tasks to ensure that safety-critical code is fully isolated. This allows the hardware to be managed by a software hypervisor policing the execution and resourcing of tasks. By enabling the precise and robust separation of software, the Cortex-R52 decreases the amount of code that must be safety-certified, so speeding up development as software integration, maintenance and validation is easier. The processor also deals with increased software complexity while delivering the determinism and fast context switching that real-time systems demand. The safety processor implements hardware to simplify the integration of increasingly complex real-time software environments while providing the robust separation of software necessary to protect safety-critical code. It introduces an extra privilege level, which provides support for a hypervisor. This is all achieved without impacting the determinism needed for real time systems and while providing higher levels of performance from single and multicore configurations.

"The Cortex-R52 is the first processor built on the ARMv8-R architecture and it was designed from the ground up to address functional safety," said James McNiven from ARM (United Kingdom). "We are helping partners to meet particular market opportunities, especially in fully autonomous vehicles and robotics systems where specific functionality is required for safety-critical tasks. By documenting the strict development process, fault modeling and supporting software isolation, ARM is enabling a faster route to market for partners addressing these applications."

The British company, which was recently acquired by Softbank (Japan) for about 31 billion US-$, presented also the first customer for the new processor: ST Microelectronics. It is expected that French-Italian chipmaker will provide models featuring CAN connectivity – of course, supporting the CAN FD protocol. "The Cortex-R52 supports our Smart Driving vision by enabling a new range of high-performance, power-efficient SoCs for any in-vehicle application demanding real-time operation and the highest levels of functional safety, including powertrain, chassis and ADAS," said Fabio Marchiò from ST Microelectronics. "The Cortex-R52's ability to compartmentalize software provides our users with the best solution for safety without loss of determinism. Its virtualization support simplifies the consolidation of applications and functions into a single processor, delivering a shorter integration time." First micro-controllers based on Cortex-R52 are expected on the market by 2018.

As an ECU manufacturer, Denso (Japan) supports the launch of the safety processor: "We welcome the development of new processor technology to drive the evolution of embedded real-time control, which is critical to advancing capabilities for autonomous systems," said Hideki Sugimoto. The availability of ARM’s Fast Models and Cycle Models enables software partners to develop solutions for the processor. They further speed the path to market as software developers will get access to the Cortex-R52 early in the design process. The Cortex-R52 offers a 35-percent performance uplift compared to the Cortex-R5, which is already deployed in a range of safety applications. It has achieved a score of 1,36 Automark/MHz on the EEMBC AutoBench using the Green Hills Compiler 2017.

"Green Hills Software is expanding its support for ARM processors with optimizing compiler solutions for the Cortex-R52," said Dan Mender. "Through close collaboration with ARM, we deliver the industry's highest performing safety certified compiler for the Cortex-R52, enabling customers to develop safety-critical products at the highest certified levels of automotive (ASIL D) and industrial safety (SIL 3)."

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Connected cars – how the tech and auto industry integration is accelerating

Connected cars – how the tech and auto industry integration is accelerating

By Unknown   05:28   No comments:

From Google Cars to Apple and McLaren to Daimler Benz and in-car voice activated Microsoft office to specially designed safety chips – the journey is only starting

The ever tightening integration of the car industry and the digital tech industry appears to be accelerating if the number of deals, technology announcements and rumours is anything to go by.

Cars and digital technology are suddenly everywhere. In the period of just a couple of days.

Apple to buy a British supercar maker reported the FT.

This was denied by McLaren, the UK sports car manufacturer and owner of McLaren F1 racing team. But it didn’t stop the spread of comment about why this would be logical.

In another breaking news story, the electric car maker Tesla is reportedly being sued for being low on horsepower.

A group of Norwegians is has filed a lawsuit claiming that Tesla’s Model S P85D only reached horsepower of 469 and not 700 as had been marketed as an ‘insane’ mode. Tesla rejected the claims. The case is due to begin in Oslo in December. In China Tesla is facing a lawsuit which centres around its autopilot function following a fatal crash.

Over in Germany, Daimler Benz said it would extend its deal with T-Systems, the business arm of Deutsche Telekom which included its connected car platform. T-Systems connects over two million Daimler vehicles across the globe via Daimler’s proprietary connected car platform, and it will continue to operate the existing "Mercedes me connect" services for the next generation of vehicles as well. The services include live traffic information, safety functions such as emergency call, convenience services such as remote control, and infotainment apps like Internet radio and hotel/parking search functions.

Microsoft this week said in a blog that it was working with Daimler and other auto makers to bring voice activated Office365 to the car.

It said: “Many of us love our cars, but we don’t necessarily love spending time in them during the work week if it means inching forward on the freeway or being stuck in stop-and-go traffic. When we’re behind the wheel during those long commutes, we often end up behind the curve by the time we get to work.”

"To help make time in the car more productive, Microsoft is working with auto companies to bring to the car the same Office 365 communication and collaboration services you’ve come to rely on at work. Office 365 in the car includes Microsoft Exchange support, which integrates your work calendar, to-do list and contacts, with all of them using your car’s voice and navigation systems."

Daimler AG recently announced it will start using what it calls, “In Car Office” in some of its Mercedes models beginning in mid-2017.

“Microsoft is working with auto companies to make time spent in vehicles more efficient and connected to people’s daily lives,” said Kevin Dallas, corporate vice president of Business Development at Microsoft. “This collaboration with Daimler represents a new emphasis on consumer productivity within the car as we look forward to autonomous driving in the future.”

The system, “knows about your next phone conferences and dials you in automatically while you’re in the car,” said Dieter Zetsche, chairman of the board of management of Daimler AG and head of Mercedes-Benz Cars, speaking at IFA 2016 in Berlin earlier this month.

The service can also tap into your calendar data and auto-populate your car’s navigation unit with driving directions for an upcoming meeting. In the future, when autonomous vehicles become a reality, the service will become a platform for more extensive tasks like Skype video chats.

Here the in the UK and deep down at the technology level ARM Holdings, announced a ‘safety’ chip for autonomous vehicles.

ARM has launched a new real-time processor with advanced safety features for autonomous vehicles and medical and industrial robots. The ARM Cortex-R52 was designed to address functional safety in systems that must comply with ISO 26262 ASIL D and IEC 61508 SIL 3, the most stringent safety standards in the automotive and industrial markets

STMicroelectronics is the first ARM partner to announce it has licensed the high performance processor to enable it to create highly integrated SoCs for the automotive market.

The Cortex-R52 is the first processor built on the ARMv8-R architecture and it was designed from the ground up to address functional safety," said James McNiven, general manager for CPU and media processing groups, ARM. "We are helping partners to meet particular market opportunities, especially in fully autonomous vehicles and robotics systems where specific functionality is required for safety-critical tasks. By documenting the strict development process, fault modelling and supporting software isolation, ARM is enabling a faster route to market for partners addressing these applications

The Cortex-R52 offers hardware-enforced separation of software tasks to ensure safety-critical code is fully isolated. This allows the hardware to be managed by a software hypervisor policing the execution and resourcing of tasks. By enabling the precise and robust separation of software, the Cortex-R52 decreases the amount of code that must be safety-certified, so speeding up development as software integration, maintenance and validation is easier. The processor also deals with increased software complexity while delivering the determinism and fast context switching that real-time systems demand

The Cortex-R52 supports our Smart Driving vision by enabling a new range of high-performance, power-efficient SoCs for any in-vehicle application demanding real-time operation and the highest levels of functional safety, including powertrain, chassis and ADAS," said Fabio Marchiò, Automotive & Discrete Group Vice President and GM at the Automotive Digital Division, STM Microelectronics. The ability to compartmentalise software provides our users with the best solution for safety without loss of determinism. Its virtualisation support simplifies the consolidation of applications and functions into a single processor, delivering a shorter integration time. DENSO, a leading global supplier of advanced automotive technology, systems and components is supporting the launch.

ARM was sold to Japan's Softbank back in July. Read Why did Softbank buy ARM

So it appears that whatever else you will be doing in your car in the future, you won’t be driving it 

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ARM upgrades realtime offerings to v8-R and adds Cortex-R52

ARM upgrades realtime offerings to v8-R and adds Cortex-R52

By Unknown   23:50   No comments:

Four cores with a lot of enhancements for safety critical users
ARM has introduced a new realtime core and architecture, lets welcome the new v8-R and Cortex-R52. If you are into realtime processors this is a big deal, if not, you will probably use one anyway.

Until now the -R line of ARM cores was based on the v7-R ISA with three prominent members, the R7 and R8 lines for storage and modem type work and the R5 for safety critical applications. The former pair needs hard realtime functionality, the latter needs that and safety critical certifications. While you want your HDD reads to be reliable, you want your antilock braking system to be a whole other level of reliable. And certified. And really mean it. Think ASIL-D and related safety specs for a starting point.

It is this latter arena where the new R52 core plays, it is a safety critical hard realtime core with the need for more performance without sacrificing reliability or functionality. The new v8-R ISA brings a lot to the table here in three main groups, added functionality, lowered latency, and ease of use. One thing that you probably assumed are 64-bit functions based on the v8- part but v8-R is still only 32-bit. In the world the -R cores play in this isn’t a problem at all, it isn’t and never will be a consumer oriented core.

                                               The block diagram of the Cortex-R52

On the surface the R52 looks pretty familiar, four clustered cores, AXI-5 bus, and bunch of memory options. When you dig a little deeper you start seeing differences like the debug and trace block plus an interrupt controller directly on the cluster of CPUs. Even with all of this, v8-R is code directly compatible with v7-R so no rewrite worries for your embedded and certified code. Lets take a look at the high points above and the difference a two makes when going from an R5 to an R52 other than the “up to 35%’ performance uplift”.

First of all there is the deterministic architecture top to bottom which kind of necessitates in-order execution. The R52 is superscalar but it is still in-order so no problems there. What is a really odd addition for those coming from the -A or generalized CPU world is the deterministic memory portion. If you need realtime operation, memory accesses can be a problem. The R52 solves this by adding three TCM or Tightly Coupled Memory ports. If you have an SOC or system you can know your memory latency and adjust your code accordingly. This goes a long way towards a usable deterministic architecture and does a lot to fix memory latency. By fix we mean make consistent, not remove.

Latency is also addressed with the integrated interrupt controller on the cluster. ARM claims what was ~66 cycles of latency for an interrupt with an external IC is now ~27 cycles with the new way. If you think about how a realtime core works, basically sitting in a wait loop until it gets interrupted, this is a massive gain in performance for the system. Similarly a full context switch for a core is now a huge 14x faster than before. More interestingly this latency reduction is not code visible so no changes needed there. Changes in this realm are both costly and require re-certification so again this is a huge win.

On the functionality side there are a lot of improvements too, starting with added crypto instructions. This is necessary to prevent government agencies from illegally recording your antilock brake controller to dashboard blinky-light data stream. That is a joke but we assume there is a need for encryption on a lot of safety critical devices, with the R52 core you now have it along with a few lesser added instructions.

A lot of the new functionality comes from a new privilege level called EL2 which essentially allows v8-R devices to run a hypervisor. We won’t go into why a hypervisor is useful in this realm, it should be pretty obvious. One thing it does do is allow non-realtime and non-safety critical code to run on the same SoC without as much fear but there are probably much better ways to accomplish the same goal. Since the R52 has an AXI-5 bus, you could just add a -M or -A class cluster on the bus and run your movies or infotainment system on that.

Four cores plus a hypervisor in a realtime system essentially equals four discrete systems with nearly ironclad process separation, a really good basis for backup processes, checksums, multiple iterations of the same thing for failovers. Going one step further ARM has put lockstep modes in R52 so you can have two cores each with a shadow core running automatically. Once again this will save SoC designers a lot of headaches because it is not only done for them but done in a standardized way. One thing the R52 can not do is operate in 3-way lockstep for voting type operations but if you need it, you can implement it yourself.

The ease of use bit is a little harder to explain if you are not familiar with realtime cores and programming. In this world code is chunked into regions which are effectively hard separated from each other. You don’t really switch tasks as much as you interrupt something and do a process and go back to waiting on another interrupt. Code is more discrete chunks which define a single task rather than a monolithic blob of everything and the kitchen sink.

To address the ease of use side of this world, the v8-R ISA has made the code regions a lot easier to use. It starts with more flexible region sizes so your code is more likely to live in one region now where it may have had to span multiple regions before. Better yet regions had to be page aligned on v7-R and before, now they only need to be on 64-byte boundaries. This change may require recoding and recertification to take advantage of, but it will simplify the result and make maintenance and updates easier. One time pain, long-term big gains.

                                                     The trend is obvious

As you can see from the diagram above, in cars code complexity is linearly related to rim diameter which has been increasing rapidly. Seriously though you probably understand why we are on the verge of an explosion in realtime code complexity, ADAS, self-driving, AI based devices, and lots more mean this exponential rise in code, more importantly safety certified realtime code, is not going to slow down any time soon.

To address this, ARM introduced v8-R and the first v8-R core, the Cortex-R52. It may not be 64-bit like v8-A but it doesn’t need to be. What it does need to bring to the table is more performance, lower latencies, and ease of use/programming. It looks like ARM has delivered nicely on all three of these goals for their new ISA and core. With luck your next car will use one and automatically drive to you home rather than through your home.

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