Advertising

Showing posts with label ARM announcement. Show all posts
Showing posts with label ARM announcement. Show all posts

Tuesday, 15 November 2016

Unknown

Packet.net strong-ARMs cloud for $0.005 per core per hour

Packet.net strong-ARMs cloud for $0.005 per core per hour


Packet.net, a bare-metal cloud aimed at developers, has flicked the switch on cloud-running servers powered by a pair of Cavium's 48-core ARMv8-A ThunderX processors.

ARMv8-A ThunderX processors

CEO Zachary Smith told The Register that the company's cooked up the cloud for a few reasons. Price is one: Packet will offer ARM cores at a tenth of the price it charges for Intel cores, at US$0.50 per hour per server, or $0.005 per core per hour. Smith thinks that will be a head-turner by itself.

He also thinks developers will appreciate the chance to try native Docker on many-cored machines and appreciate the opportunity an ARM-powered cloud represents as they pursue 100 per cent portable software. He believes open source folk will see the arrival of an ARM-powered cloud as incentive to accelerate cross-platform versions of their pet projects.

Even ARM will benefit, he says, because having a working cloud on the market will give both it and licensees more reason to innovate for the data centre.

ARM's recent purchaser, SoftBank, recently tipped some money into Packet.net, but Smith swears he's had a long-term ambition to offer an ARM-powered cloud, if only because he enjoys having multiple ARM server CPU vendors willing to do deals. That kind of competition is not currently possible in the x86 world, at least until AMD returns to servers in 2017.

Smith also feels that ARM clouds are inevitable, probably thanks to telcos looking to offer cores to rent at the edge of their networks. The CEO feels that telcos will build edge clouds because they're sick of over-the-top players having all the fun and profits: this time telcos want to build a revenue-generating platform beyond mere carriage.

For now, Packet's ARM cloud offers 64-bit Ubuntu 16.04, but promises that CoreOS, FreeBSD and CentOS are in the pipeline. Four different ARM server configurations are also in the works.

The cloud will have an API, a portal, and will also be accessible from DevOps favourites likes Terraform and Ansible. Four of the company's bit barns – in Parsippany New Jersey, Sunnyvale California, Amsterdam and Tokyo – will offer the service as of Tuesday.

"We want to offer a super-cheap, 'you would be stupid not to try it' offering," Smith told The Register. "If we can get the open source ecosystem rebooted, I think Intel's grip on the data centre will be shattered." ®
 
Read More
Unknown

This Startup Is Betting Big on ARM Chips Shaking Up the Cloud Equation

Packet’s not-so-secret weapon: energy-sipping bare-metal servers using ARM processors. A little-known startup is making a big bet that it can parlay new ARM chips, and backing from a Japanese investment giant, to make its presence felt among the cloud computing giants.

ARM-powered cloud
The company, Packet, on Tuesday is launching new rentable “bare metal” computing services based on the ARM v8 chip architecture from its data centers in New Jersey, Northern California, Amsterdam, and Tokyo. Customers can set up and launch these resources within minutes, Packet said

The move is unusual because ARM chips are not commonly found in the servers that power corporate data centers or public cloud computer services, such as those sold by Amazon  AMZN -1.47%  Web Services. They do, however, dominate the smartphone market—scratch an Apple  AAPL -1.87%  iPhone (God forbid) and you’ll see an ARM chip. And many techies see ARM’s energy-efficient design as an interesting option for servers going forward.

Bare metal servers, unlike typical cloud-based servers, are not virtualized. That means they can run certain jobs, like databases, faster than virtualized cloud servers. IBM  IBM -2.15% , Rackspace  RAX 0.00%  and some other cloud companies already offer bare metal options for rent.

New York-based Packet, which disclosed $9.4 million in funding from Softbank in September, aims to satisfy what it sees as a growing market for bare-metal computing on demand. Softbank is a great ally for Packet, since it is buying ARM Holdings for $32 billion. ARM Holdings is the U.K. company that controls and licenses ARM processor designs to manufacturers.

Packet CEO Zachary Smith acknowledges that this is a David and Goliath tale in many ways. Intel chips dominate cloud computing services and equipment, as they do inside corporate data centers. And Amazon Web Services and Microsoft  MSFT -0.71%  Azure are the behemoths in the public cloud market; both organizations sell (or rent) massive amounts of computing power to customers from their Intel-dominated data centers.

Smith has no problem stipulating that Intel owns “99 point whatever percent” of the data center chip architecture, with a smattering of IBM-backed Power chips and Oracle  ORCL -1.42%  SPARC chips here and there. Likewise, he admits that Intel  INTC 0.23%  x86 chips work with everything, that Intel fields a huge partner ecosystem of software, hardware and add-on providers, and that it also owns the biggest-and-best fabrication facilities.

But, he also insists that big changes over the past year are shifting the balance of power. “There are a billion smartphones out there with ARM chips,” Smith noted. As a result, there many manufacturers and plenty of ARM licensees working with the technology. What that means is ARM now has an ecosystem all its own, which is something Softbank and Packet hope to capitalize on.

Taking on established cloud giants like Amazon Web Services is a long shot but there are some critical nuances to consider.

First, the market for rentable computer resources is growing fast enough now to float many boats, including newcomers, provided they have funding and innovative services that corporate developers and their IT strategy overlords want.

Second, even cloud giants admit that new chip technologies will be critical as cloud computing matures. Energy-efficient ARM chips that already power an estimated 95% of smartphones are bound to get a look, especially if their use can reduce data center power requirements. Microsoft and Google also talk up x86 alternative chips for some uses. And Amazon last year bought Annapurna Labs, an ARM chip licensee. Clearly, there is interest here.

Smith contended that the widespread use of ARM chips in other scenarios is also making it easier for cloud service providers (and others) to get early previews of the technology and to develop offerings using it.
Read More
Unknown

Cavium and Leading Partners Showcase ThunderX® ARM-based Server Platforms, QLogic® FastLinQ Ethernet Adapters and Fibre Channel HBAs for High Performance Computing at SC16

SALT LAKE CITYNov. 15, 2016 -- Cavium, Inc. (NASDAQ: CAVM), a leading provider of semiconductor products that enable intelligent processing for enterprise, data center, cloud, wired and wireless networking, today announced the showcasing of ThunderX based workload optimized server platforms and the QLogic FastLinQ Ethernet Adapters and Fibre Channel HBAs for High Performance Computing, Data Analytics, Scale Out Storage and Hyperscale Data Centers at SC16 in the Salt Palace Convention Center in Salt Lake City, Utah.  The show Expo dates are from Monday, November 14th to Thursday, November 17th.
64-bit ARMv8server processor
ThunderX is Cavium's 64-bit ARMv8server processor family for next generation high performance computing and hyperscale workloads. With up to 48 high-performance custom cores, single and dual socket capability, high memory bandwidth and capacity, and integrated hardware accelerators, ThunderX enables best-in-class ARMv8 performance per dollar and performance per watt. The ThunderX family includes multiple SKUs that enable servers optimized for compute, storage, network and security workloads in the cloud, and is widely supported by industry-leading OS, hypervisor, software tool and application vendors. ThunderX is also optimized for networking specific workloads such as Network Functions Virtualization (NFV).
From the heart of the data center, to the edge of the enterprise, and in the cloud,  QLogic® Fibre Channel and Ethernet adapters deliver an uncompromising suite of features, performance and reliability with a comprehensive suite of offerings that span 10GbE to 100GbE, and 8GFC to 32GFC (Gen6).  QLogic Fibre Channel adapters are the gold standard in SAN connectivity, trusted with running mission critical applications across the world, and the QLogic FastLinQ Ethernet adapters are the most flexible data networking solutions in the industry supporting FCoE, iSCSI and RDMA transports.  Together, these products make Cavium the industry leader in high performance network connectivity solutions.
Show Highlights and Demonstrations
Cavium executives will be available to discuss the broad range of ThunderX based production platforms, which are ideal for critical workloads such as highly parallel HPC applications, scale out storage with CEPH, Apache Hadoop for Big Data Analytics, distributed data bases such as MySQL & Cassandra, and Web Serving with NGINX. In addition to the ThunderX based ODM and OEM platforms, Cavium's QLogic® FastLinQ Ethernet Adapters and Fibre Channel HBAs will be on display at Cavium's booth #4057 including:
  • QLogic FastLinQ 10/25/40/50/100 Gb Ethernet Adapters
  • QLogic Enhanced Gen5 and Gen6 Fibre Channel Adapter
  • ThunderX System Partners including: Aewyn, E4, Gigabyte and Lenovo
Cavium representatives will also be presenting more details on ThunderX at a number of partner sponsored events during the week.  These events include the ARM HPC User Group as well as presentations at the Red Hat and SUSE booths during the week at the Convention Center. 
To schedule a meeting at SC16, please send an email to sales@cavium.com and enter SC16 Meeting Request in the subject line.
About Cavium
Cavium, Inc. (NASDAQ: CAVM), offers a broad portfolio of integrated, software compatible processors ranging in performance from 1Gbps to 100Gbp that enable secure, intelligent functionality in Enterprise, Data Center, Broadband, Mobile and Service Provider Equipment, highly programmable switches which scale to 3.2Tbps and Ethernet and Fibre Channel adapters up to 100Gbps. Cavium processors are supported by ecosystem partners that provide operating systems, tools and application support, hardware reference designs and other products. Cavium is headquartered in San Jose, CA with design centers in California, Massachusetts, India, Israel, China and Taiwan.

Media Contact 
Angel Atondo
Sr. Marketing Communications Manager
Telephone: +1 408-943-7417
Email: angel.atondo@cavium.com
Read More

Friday, 23 September 2016

Unknown

ARM processor dedicated for functional safety applications

The Cortex-R52 by ARM was designed to address functional safety in systems that need to comply with ISO 26262 (ASIL D) and IEC 61508 (SIL 3). ST Microelectronics is the first chip vendor, which licensed the processor.

Cortex-R52 by ARM                                                  ARM processor dedicated for functional safety applications

The Cortex-R52 offers hardware-enforced separation of software tasks to ensure that safety-critical code is fully isolated. This allows the hardware to be managed by a software hypervisor policing the execution and resourcing of tasks. By enabling the precise and robust separation of software, the Cortex-R52 decreases the amount of code that must be safety-certified, so speeding up development as software integration, maintenance and validation is easier. The processor also deals with increased software complexity while delivering the determinism and fast context switching that real-time systems demand. The safety processor implements hardware to simplify the integration of increasingly complex real-time software environments while providing the robust separation of software necessary to protect safety-critical code. It introduces an extra privilege level, which provides support for a hypervisor. This is all achieved without impacting the determinism needed for real time systems and while providing higher levels of performance from single and multicore configurations.

"The Cortex-R52 is the first processor built on the ARMv8-R architecture and it was designed from the ground up to address functional safety," said James McNiven from ARM (United Kingdom). "We are helping partners to meet particular market opportunities, especially in fully autonomous vehicles and robotics systems where specific functionality is required for safety-critical tasks. By documenting the strict development process, fault modeling and supporting software isolation, ARM is enabling a faster route to market for partners addressing these applications."

The British company, which was recently acquired by Softbank (Japan) for about 31 billion US-$, presented also the first customer for the new processor: ST Microelectronics. It is expected that French-Italian chipmaker will provide models featuring CAN connectivity – of course, supporting the CAN FD protocol. "The Cortex-R52 supports our Smart Driving vision by enabling a new range of high-performance, power-efficient SoCs for any in-vehicle application demanding real-time operation and the highest levels of functional safety, including powertrain, chassis and ADAS," said Fabio Marchiò from ST Microelectronics. "The Cortex-R52's ability to compartmentalize software provides our users with the best solution for safety without loss of determinism. Its virtualization support simplifies the consolidation of applications and functions into a single processor, delivering a shorter integration time." First micro-controllers based on Cortex-R52 are expected on the market by 2018.

As an ECU manufacturer, Denso (Japan) supports the launch of the safety processor: "We welcome the development of new processor technology to drive the evolution of embedded real-time control, which is critical to advancing capabilities for autonomous systems," said Hideki Sugimoto. The availability of ARM’s Fast Models and Cycle Models enables software partners to develop solutions for the processor. They further speed the path to market as software developers will get access to the Cortex-R52 early in the design process. The Cortex-R52 offers a 35-percent performance uplift compared to the Cortex-R5, which is already deployed in a range of safety applications. It has achieved a score of 1,36 Automark/MHz on the EEMBC AutoBench using the Green Hills Compiler 2017.

"Green Hills Software is expanding its support for ARM processors with optimizing compiler solutions for the Cortex-R52," said Dan Mender. "Through close collaboration with ARM, we deliver the industry's highest performing safety certified compiler for the Cortex-R52, enabling customers to develop safety-critical products at the highest certified levels of automotive (ASIL D) and industrial safety (SIL 3)."
Read More
Unknown

Connected cars – how the tech and auto industry integration is accelerating

From Google Cars to Apple and McLaren to Daimler Benz and in-car voice activated Microsoft office to specially designed safety chips – the journey is only starting

The ever tightening integration of the car industry and the digital tech industry appears to be accelerating if the number of deals, technology announcements and rumours is anything to go by.

Cars and digital technology are suddenly everywhere. In the period of just a couple of days.

Apple to buy a British supercar maker reported the FT.

This was denied by McLaren, the UK sports car manufacturer and owner of McLaren F1 racing team. But it didn’t stop the spread of comment about why this would be logical.

In another breaking news story, the electric car maker Tesla is reportedly being sued for being low on horsepower.

A group of Norwegians is has filed a lawsuit claiming that Tesla’s Model S P85D only reached horsepower of 469 and not 700 as had been marketed as an ‘insane’ mode. Tesla rejected the claims. The case is due to begin in Oslo in December. In China Tesla is facing a lawsuit which centres around its autopilot function following a fatal crash.

Over in Germany, Daimler Benz said it would extend its deal with T-Systems, the business arm of Deutsche Telekom which included its connected car platform. T-Systems connects over two million Daimler vehicles across the globe via Daimler’s proprietary connected car platform, and it will continue to operate the existing "Mercedes me connect" services for the next generation of vehicles as well. The services include live traffic information, safety functions such as emergency call, convenience services such as remote control, and infotainment apps like Internet radio and hotel/parking search functions.

Microsoft this week said in a blog that it was working with Daimler and other auto makers to bring voice activated Office365 to the car.

It said: “Many of us love our cars, but we don’t necessarily love spending time in them during the work week if it means inching forward on the freeway or being stuck in stop-and-go traffic. When we’re behind the wheel during those long commutes, we often end up behind the curve by the time we get to work.”

"To help make time in the car more productive, Microsoft is working with auto companies to bring to the car the same Office 365 communication and collaboration services you’ve come to rely on at work. Office 365 in the car includes Microsoft Exchange support, which integrates your work calendar, to-do list and contacts, with all of them using your car’s voice and navigation systems."

Daimler AG recently announced it will start using what it calls, “In Car Office” in some of its Mercedes models beginning in mid-2017.

“Microsoft is working with auto companies to make time spent in vehicles more efficient and connected to people’s daily lives,” said Kevin Dallas, corporate vice president of Business Development at Microsoft. “This collaboration with Daimler represents a new emphasis on consumer productivity within the car as we look forward to autonomous driving in the future.”

The system, “knows about your next phone conferences and dials you in automatically while you’re in the car,” said Dieter Zetsche, chairman of the board of management of Daimler AG and head of Mercedes-Benz Cars, speaking at IFA 2016 in Berlin earlier this month.

The service can also tap into your calendar data and auto-populate your car’s navigation unit with driving directions for an upcoming meeting. In the future, when autonomous vehicles become a reality, the service will become a platform for more extensive tasks like Skype video chats.

Here the in the UK and deep down at the technology level ARM Holdings, announced a ‘safety’ chip for autonomous vehicles.

ARM has launched a new real-time processor with advanced safety features for autonomous vehicles and medical and industrial robots. The ARM Cortex-R52 was designed to address functional safety in systems that must comply with ISO 26262 ASIL D and IEC 61508 SIL 3, the most stringent safety standards in the automotive and industrial markets

STMicroelectronics is the first ARM partner to announce it has licensed the high performance processor to enable it to create highly integrated SoCs for the automotive market.

The Cortex-R52 is the first processor built on the ARMv8-R architecture and it was designed from the ground up to address functional safety," said James McNiven, general manager for CPU and media processing groups, ARM. "We are helping partners to meet particular market opportunities, especially in fully autonomous vehicles and robotics systems where specific functionality is required for safety-critical tasks. By documenting the strict development process, fault modelling and supporting software isolation, ARM is enabling a faster route to market for partners addressing these applications

The Cortex-R52 offers hardware-enforced separation of software tasks to ensure safety-critical code is fully isolated. This allows the hardware to be managed by a software hypervisor policing the execution and resourcing of tasks. By enabling the precise and robust separation of software, the Cortex-R52 decreases the amount of code that must be safety-certified, so speeding up development as software integration, maintenance and validation is easier. The processor also deals with increased software complexity while delivering the determinism and fast context switching that real-time systems demand

The Cortex-R52 supports our Smart Driving vision by enabling a new range of high-performance, power-efficient SoCs for any in-vehicle application demanding real-time operation and the highest levels of functional safety, including powertrain, chassis and ADAS," said Fabio Marchiò, Automotive & Discrete Group Vice President and GM at the Automotive Digital Division, STM Microelectronics. The ability to compartmentalise software provides our users with the best solution for safety without loss of determinism. Its virtualisation support simplifies the consolidation of applications and functions into a single processor, delivering a shorter integration time. DENSO, a leading global supplier of advanced automotive technology, systems and components is supporting the launch.

ARM was sold to Japan's Softbank back in July. Read Why did Softbank buy ARM

So it appears that whatever else you will be doing in your car in the future, you won’t be driving it 
Read More

Wednesday, 21 September 2016

Unknown

ARM upgrades realtime offerings to v8-R and adds Cortex-R52

Four cores with a lot of enhancements for safety critical users
ARM has introduced a new realtime core and architecture, lets welcome the new v8-R and Cortex-R52. If you are into realtime processors this is a big deal, if not, you will probably use one anyway.
Until now the -R line of ARM cores was based on the v7-R ISA with three prominent members, the R7 and R8 lines for storage and modem type work and the R5 for safety critical applications. The former pair needs hard realtime functionality, the latter needs that and safety critical certifications. While you want your HDD reads to be reliable, you want your antilock braking system to be a whole other level of reliable. And certified. And really mean it. Think ASIL-D and related safety specs for a starting point.

It is this latter arena where the new R52 core plays, it is a safety critical hard realtime core with the need for more performance without sacrificing reliability or functionality. The new v8-R ISA brings a lot to the table here in three main groups, added functionality, lowered latency, and ease of use. One thing that you probably assumed are 64-bit functions based on the v8- part but v8-R is still only 32-bit. In the world the -R cores play in this isn’t a problem at all, it isn’t and never will be a consumer oriented core.

ARM upgrades realtime offerings to v8-R and adds Cortex-R52
                                               The block diagram of the Cortex-R52


On the surface the R52 looks pretty familiar, four clustered cores, AXI-5 bus, and bunch of memory options. When you dig a little deeper you start seeing differences like the debug and trace block plus an interrupt controller directly on the cluster of CPUs. Even with all of this, v8-R is code directly compatible with v7-R so no rewrite worries for your embedded and certified code. Lets take a look at the high points above and the difference a two makes when going from an R5 to an R52 other than the “up to 35%’ performance uplift”.

First of all there is the deterministic architecture top to bottom which kind of necessitates in-order execution. The R52 is superscalar but it is still in-order so no problems there. What is a really odd addition for those coming from the -A or generalized CPU world is the deterministic memory portion. If you need realtime operation, memory accesses can be a problem. The R52 solves this by adding three TCM or Tightly Coupled Memory ports. If you have an SOC or system you can know your memory latency and adjust your code accordingly. This goes a long way towards a usable deterministic architecture and does a lot to fix memory latency. By fix we mean make consistent, not remove.

Latency is also addressed with the integrated interrupt controller on the cluster. ARM claims what was ~66 cycles of latency for an interrupt with an external IC is now ~27 cycles with the new way. If you think about how a realtime core works, basically sitting in a wait loop until it gets interrupted, this is a massive gain in performance for the system. Similarly a full context switch for a core is now a huge 14x faster than before. More interestingly this latency reduction is not code visible so no changes needed there. Changes in this realm are both costly and require re-certification so again this is a huge win.

On the functionality side there are a lot of improvements too, starting with added crypto instructions. This is necessary to prevent government agencies from illegally recording your antilock brake controller to dashboard blinky-light data stream. That is a joke but we assume there is a need for encryption on a lot of safety critical devices, with the R52 core you now have it along with a few lesser added instructions.

A lot of the new functionality comes from a new privilege level called EL2 which essentially allows v8-R devices to run a hypervisor. We won’t go into why a hypervisor is useful in this realm, it should be pretty obvious. One thing it does do is allow non-realtime and non-safety critical code to run on the same SoC without as much fear but there are probably much better ways to accomplish the same goal. Since the R52 has an AXI-5 bus, you could just add a -M or -A class cluster on the bus and run your movies or infotainment system on that.

Four cores plus a hypervisor in a realtime system essentially equals four discrete systems with nearly ironclad process separation, a really good basis for backup processes, checksums, multiple iterations of the same thing for failovers. Going one step further ARM has put lockstep modes in R52 so you can have two cores each with a shadow core running automatically. Once again this will save SoC designers a lot of headaches because it is not only done for them but done in a standardized way. One thing the R52 can not do is operate in 3-way lockstep for voting type operations but if you need it, you can implement it yourself.

The ease of use bit is a little harder to explain if you are not familiar with realtime cores and programming. In this world code is chunked into regions which are effectively hard separated from each other. You don’t really switch tasks as much as you interrupt something and do a process and go back to waiting on another interrupt. Code is more discrete chunks which define a single task rather than a monolithic blob of everything and the kitchen sink.

To address the ease of use side of this world, the v8-R ISA has made the code regions a lot easier to use. It starts with more flexible region sizes so your code is more likely to live in one region now where it may have had to span multiple regions before. Better yet regions had to be page aligned on v7-R and before, now they only need to be on 64-byte boundaries. This change may require recoding and recertification to take advantage of, but it will simplify the result and make maintenance and updates easier. One time pain, long-term big gains.

ARM introduced v8-R and the first v8-R core, the Cortex-R52
                                                     The trend is obvious

As you can see from the diagram above, in cars code complexity is linearly related to rim diameter which has been increasing rapidly. Seriously though you probably understand why we are on the verge of an explosion in realtime code complexity, ADAS, self-driving, AI based devices, and lots more mean this exponential rise in code, more importantly safety certified realtime code, is not going to slow down any time soon.

To address this, ARM introduced v8-R and the first v8-R core, the Cortex-R52. It may not be 64-bit like v8-A but it doesn’t need to be. What it does need to bring to the table is more performance, lower latencies, and ease of use/programming. It looks like ARM has delivered nicely on all three of these goals for their new ISA and core. With luck your next car will use one and automatically drive to you home rather than through your home.

Read More